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NXP Semiconductors /LPC176x5x /SYSCON /PLL0FEED

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Interpret as PLL0FEED

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PLL0FEED0RESERVED

Description

PLL0 Feed Register

Fields

PLL0FEED

The PLL0 feed sequence must be written to this register in order for PLL0 configuration and control register changes to take effect.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data